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Altera_Forum
Honored Contributor
10 years agoFPP Configuration Timing: Clock Stop = high
We would like to configure a Cyclone V GX C5 using FPP via a TI DSP's EMIFA (External Memory Interface) bus (in Asynchronous mode). VC-52007 2015.12.21 Figure 7-3 mentions in note (5): If needed, pau...
Altera_Forum
Honored Contributor
10 years agoOK, thanks!