FPGA/CPLD Beginning (1st project)

Good day

I want to do a thesis project based which is the development of the device:

with 3 interfaces, and memory unit (eg up to 128 words by 8 bits) (data from which will be added to the data input and fed to the input).

Two input output interface information

1 for programming memory

Need advice, because I have no experience developing FPGA

I. What type of interface would be more appropriate. to implement them on FPGAs?

II. And what type of FPGA / CPLD the optimum?

I have the desire to make the finished product.

Thanks for the tips.