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Altera_Forum
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11 years ago

FPGA-to-HPS SDRAM vs. HPS-to-FPGA

I'm a relatively new EE (about 5 years EE experience), but I have only a few months of hardware design. I have a design question that I'm hoping someone can shed some light on, teach me a little :-) ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
11 years ago

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Since you are trying to set aside a large region of memory for the FPGA to access it might be more manageable to allocate a large continous memory, map it over to physical memory, and access it used DMAs in the FPGA and cacheable accesses from the processor. I have no clue how to do that but the sofltware folks in this forum probably do.

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Have a look at this example for a starting point: http://rocketboards.org/foswiki/view/projects/myfirstmodule

It is a driver (loadable kernel module) that you need to load using "insmod" in the terminal. The module allocates an area of memory using kmalloc(). The key difference with kmalloc() is that it always allocates physically contigious memory.

You can read the physical address that is allocated at "/sys/bus/platform/drivers/mydriver/buffer_base_phys"

Then the FPGA can access this area using the FPGA2HPS SDRAM port starting at the address found above.