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Altera_Forum
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10 years ago

FPGA-to-HPS bridge, too slow?

Hi, my co-worker is using the Cyclone V with the embedded ARM cores. I often stop by his cube and ask him his opinion of the SoC. His biggest complaint is the FPGA-to-HPS bridge which he says is a bi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Hi, I use only lightweight bridge for configuring DMAs per Avalon-MM interface. I transfer data from FPGA directly to DDRAM without going to CPU. The CPU only waits for transfer to complete.

If You add "Cyclone V Hard processor system" You can define that You want to have "FPGA-to-HPS SD-RAM interface" available so You get port f2h_sdram0_data in hps component. Then I connect DMAs mm_write/mm_read ports to f2h_sdram0_data.