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Altera_Forum
Honored Contributor
Honored ContributorFPGA to HPS Bridge access
Hello everyone, I've been trying to send data from FPGA to HPS. I have a few soft IP cores in the FPGA and I want the HPS to read signal data from one of these cores (2 signals of 16 bit width...
Altera_ForumHonored Contributor
Honored Contributor#1 you can either create a Qsys component with an Avalon-MM or AXI master interface and connect it to the H2F bridge interface that is exposed or you can click on the H2F bridge slave port and "export" it which will make it available outside of the Qsys system. Basically it's your call, I typically use the former since I'd rather design standard interfaces and let the integration tools wiring things up for me but if you prefer wiring and adapting interfaces manually that's possible too.
# 2 You don't need to remap the H2F bridge like the other two bridges but you do need to make sure it recieves a valid clock and is pulled out of reset.
