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Altera_Forum
Honored Contributor
Honored ContributorFPGA specific timing requirement
I need to output a pulse signal from the FPGA that is very time sensitive. I would like to have control of the period by a resolution of 2 ns. This would require a 500 MHz output clock. Briefly looki...
Altera_ForumHonored Contributor
Honored ContributorI basically have a max period of 2us. In this period I need to pulse one signal and then turn it off and pulse another signal and turn it off. The next period of this firing will then change by a measurement with a resolution of 2ns. These signals are like a clock you could say as they enable the device they're pulsing to turn on and off.
Bascially, I need to have very precise control over the frequency i'm pulsing because I only have a very small bandwith that i'm working with and the slope is very steep over this bandwith so that a few hundred Hz difference can produce a big difference in my output. With 2ns resolution i'm looking at only a resolution of 320 Hz. EDIT: For clarity
