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Altera_Forum's avatar
Altera_Forum
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15 years ago

FPGA specific timing requirement

I need to output a pulse signal from the FPGA that is very time sensitive. I would like to have control of the period by a resolution of 2 ns. This would require a 500 MHz output clock. Briefly looki...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

As I said it is just a square wave that is high and low. I want to control the period of this pulse wave to control the period of the device it turns on and off. It would just be driving one output pin high and low but to the accuracy of 2 ns.

Does the signal type matter in this case? I thought those signal types were mainly for data transfers not something that would be needed for an output as simple as this. This is my first time trying to combine an FPGA with another device, so forgive my ignorance.

EDIT: If you're referring to the input signals then yes they will be LVDS.