Forum Discussion
Seadog
Occasional Contributor
3 years agoFor what it's worth, by the time you finish migrating the FPGA design(s), completing verification, and redesigning the board(s), whatever lead time data you collect today will be irrelevant.
For what it's worth, by the time you finish migrating the FPGA design(s), completing verification, and redesigning the board(s), whatever lead time data you collect today will be irrelevant.