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Jpascal's avatar
Jpascal
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3 years ago
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FPGA non-volatile key and tamper bit protection

Hi, To implement security feature on Cyclone V, I am following this application note : https://www.intel.com/content/www/us/en/docs/programmable/683269/current/using-the-design-security-features-in...
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  • NurAiman_M_Intel's avatar
    NurAiman_M_Intel
    3 years ago

    Hi,


    Apologies for the delay in response as I was checking this with our internal team.


    The conclusion after discussed with engineering is when the tamper resistance bit is set, that means the device will accept only encrypted POF. Therefore, you can’t reprogram the key.


    Since they key is lost and unable to reprogram the key, the device is unable to program.


    Regards,

    Aiman


Jpascal's avatar
Jpascal
Icon for New Contributor rankNew Contributor
3 years ago

Hi,

I have a 28nm device

Considering this part of AN556 :

I can only issue UNLOCK instruction using internal JTAG interface. My understanding is that interface can only be enabled by including a specific IP in FPGA design. Since I can't configure FPGA anymore, it is the same problem...

Regards