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Altera_Forum
Honored Contributor
11 years agoFPGA for Evolvable Hardware Implementation
Hello, which FPGA device is suitable for working on the topic evolvable hardware? I'm planning to use this method: 1. Generate random Bitstream 2. Load Bitstream to FPGA 3. Fitness-Test 4. Modify...
Altera_Forum
Honored Contributor
11 years agoAlso random configuration could be dangerous - if you happen to generate a bit stream which happens to pass CRC checks, it could also happen to implement a design where a LUT output is connected back to its input with a not gate design - that would oscillate very very fast and possibly burn out the cell.