FPGA Configuration Problem

Question

A strange one here. I'm trying to power up a Cyclone III EP3C10 in active serial mode, and even before the device tries to access the PROM it drives all I/O pins low and does not make any attempt at external access.

The 1.2, 2.5, and 3.3 V supplies all rise monotonically within 5 mS of each other, all the right pins are connected to all the right voltages, but the only activity I see is that the nConfig and Init_Done lines rise to about 2V while the device is powering up, and then they go to ground. nStatus, Conf_Done, and all other lines never go high.

I want to blame the chip, but we've installed 2 chips on 2 boards, and we're seeing the same problem. Unfortunately, we don't have any known good designs we can use to test out the chip.

Any ideas? Thanks.

altera_forum · Answer

If it's an EQFP144 device, did you connect the enhanced pad to GND?

altera_forum · Answer

What are your MSEL pins set to?  Jake

altera_forum · Answer

And how are the MSEL pins wired?

altera_forum · Answer

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If it's an EQFP144 device, did you connect the enhanced pad to GND?

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I just saw that pad. No, it is not grounded, but I can set that up pretty easily. Altera really doesn't draw enough attention to that pad if not connecting it can kill the entire part.

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What are your MSEL pins set to?

Jake

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And how are the MSEL pins wired?

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MSEL[2:0] is 010, and the lines are tied direct to GND or +2.5

altera_forum · Answer

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Altera really doesn't draw enough attention to that pad

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The fact, that this issue is a series topic in the forum seems to confirm your statement. I found the "exposed pad" thing mentioned in two places in the device manual and also in the Device Pin-Out document. The amount of informations hasn't changed from Device Manual V1.0 to recent V2.1.

You may want to read a ceterum censeo "Furthermore, don't forget to connect the exposed pad" in each Handbook chapter.

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FPGA Configuration Problem

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