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Altera_Forum's avatar
Altera_Forum
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11 years ago

FPGA and HPS freeze when programming FPGA

Our custom board's FPGA and HPS will freeze whenever we programming the FPGA. Our design is heavily based on Helio board.

We have tried to program it by using JTAG, U-Boot and Linux, all led to same result. Our MSEL setting is 00000. We have disabled the 3 bridges before program the FPGA.

We observed that whenever we program the FPGA, the 1.1V core voltage will drop to 0.9xxV and hence freeze the FPGA and HPS. Even if we try to manually pump in higher voltage like 1.2V or 1.3V the voltage still drop to 0.9xxV. Anybody has any idea who is drawing the current causing the voltage drop?

On a separate note, we also have this kind of strange issue where different project/compilation will give us different result where some will freeze them but some would not. Anyone know how could this happen?

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    11 years ago

    Hello, i had the same problem few months ago.

    The problem was that the FPGA held the HPS in reset.

    The HPS have more than one(internal) Reset pin. Set them all to the right level.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    11 years ago

    --- Quote Start ---

    Hello, i had the same problem few months ago.

    The problem was that the FPGA held the HPS in reset.

    The HPS have more than one(internal) Reset pin. Set them all to the right level.

    --- Quote End ---

    Which pin were you talking about? Can you point me to any relevant document?
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    11 years ago

    It was these 3 wires

    hps_0_f2h_cold_reset_req_reset_n => '1'

    hps_0_f2h_debug_reset_req_reset_n => '1'

    hps_0_f2h_warm_reset_req_reset_n => '1'

    which was not set.

    I have no document right here, sry.