Altera_ForumHonored Contributor21 years agoFPADD FPMULT for NIOS + Cyclone Hi, Not completely tested and in AHDL for compactness (will make VHDL and Verilog versions later) but runs at around 100Mhz in C6 grade cyclone 3 stage latency 32 bit version adder is appr...Show More
Altera_ForumHonored Contributor21 years agoHi, Ok, Ok - here a front end so it handles IEEE - sheesh. Steve...
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