Forum Discussion
Altera_Forum
Honored Contributor
22 years agoFPADD FPMULT for NIOS + Cyclone
Hi, Not completely tested and in AHDL for compactness (will make VHDL and Verilog versions later) but runs at around 100Mhz in C6 grade cyclone 3 stage latency 32 bit version adder is appr...
Altera_Forum
Honored Contributor
22 years agoHi,
Ok, Ok - here a front end so it handles IEEE - sheesh. Steve...