Forum Discussion

ZSism's avatar
ZSism
Icon for New Contributor rankNew Contributor
5 years ago

For Cyclone 10 LP can I use +1.8V or +3.3V VCCIO in a BANK where I connect an LVDS input?

Hi, I am using Cyclone 10 LP 80k. I have an LVDS clock connected to the dedicated clock inputs of the FPGA. In the datasheet and connection guidelines I couldn't find which rail powers the different...