Forum Discussion
ZSism
New Contributor
New ContributorFor Cyclone 10 LP can I use +1.8V or +3.3V VCCIO in a BANK where I connect an LVDS input?
Hi, I am using Cyclone 10 LP 80k. I have an LVDS clock connected to the dedicated clock inputs of the FPGA. In the datasheet and connection guidelines I couldn't find which rail powers the different...
ShafiqY_Intel
Frequent Contributor
Frequent ContributorHi Zeki,
The LVDS of Cyclone 10 LP is only powered by 2.5V. It do not support VCCINT as in the older Cyclones.
In addition, only the I/O banks 1, 2, 4, and 6 support the LVDS(dedicated) I/O standard.
Please refer below for more details:
Regards,
Matt
