Flex 6000

You can't read back the FPGA's configuration, it doesn't support it.

What you probably can do is read back the configuration from the EEPROM.

The FLEX6K is, like most other Altera FPGAs, volatile. Ie, when you power down the board it loses it's configuration.

Somewhere on the board, you'll have a configuration EEPROM from which the FPGA's configuration is loaded on power up.

There are two possible schemes to do that for an FLEX6K and the first step is to identify what kind of scheme your board is using.

A common one is to use an EPC1 PROM, which can be read/written via JTAG. If you're using that, the EPC1 should show up in your JTAG chain.

Another possible scheme, where you use a µP or CPLD to load the FPGA's configuration at power up.

* JTAG => ByteBlasterMV