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Altera_Forum's avatar
Altera_Forum
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14 years ago

Fixed point math functions

Hello,

I know that fixed point logic circuits are similar to integers.

But my question is.

Say I convert a 15bit integer (A) to fixed point <15bits.10bits> by just using

{A[14:0],10'b0000...}

And I want to do math functions like addition, subtraction, multiplication, division.

Will 'C=A*B' suffice?? How can I ensure that C is still <15bits.10bits>?

Basically, my questions is will regular integer notations such as '*, +, /, -' be ok for fixed point operations. how can I ensure that my values remain <15bits.10bits> and also check for overflow/underflow

Thank you!

7 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    You will have to do all of the hard work yourself.

    If you want to add or subtract, you first have to pad extra zeroes before performing the operation

    fp_4_3 := (fp_4_1 & "00") + (fp_2_3)

    For multiplication and devision, you don't need to adjust the factors. You just need to figure out where the fraction in the result is:

    fp_5_3 := fp_2_2 * fp_3_1

    There is a VHDL 2008 package that does all of that for you. It is called FIX_STD. Just google it.
  • Altera_Forum's avatar
    Altera_Forum
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    I have used a number of integer to float operations in2f on the mega wizzard with a cyclone III once you have a float addition subtraction division etc are easy. converting them back is all a means of float to integer.

    If this does not work you could always try the NiosII stuff.
  • Altera_Forum's avatar
    Altera_Forum
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    Hello,

    Thanks for the reply

    for the case of signed bits:

    If I have 2 inputs A(20,10) and B(20,10)

    To make them signed. I should have A(21,10) and B(21,10) < number of bits is 31

    multiplication of signed bits:

    X(42,20)= A(21,10)*B(21,10) <<< should actually be X(41,20)? Do I remove the most significant bit or the one after the MSB?

    Question 2:

    for converting back to n bits

    And to convert Y(21,10)<= {X[61],X[59:40],X[39:20]} or {X[60],X[59:40],X[39:20]} <because of the 2 sign bits

    Addition: Nbits + Nbits = 2

    X(22,10)=A(21,20) +B(21,20)

    And to convert

    Y(21,10)=X[41:0];?
  • Altera_Forum's avatar
    Altera_Forum
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    I think that all questions can be answered best by applying somenumerical examples, using pencil and paper or a pocket calculator.

    You'll notice, that you have to discard bits on the left for all multiply operations, even for fractional signed numbers (no integer bits). To avoid overflow, saturation logic has to be apllied, set the result MININT or MAXINT respectively. Saturation is also needed, if you want to handle overflows in add und sub, and for resize to fewer bits, as in your last example.

    As previously suggested, the IEEE fixed point library can be used for the operations. But it's also easy to make a few VHDL functions that wrap your own code for it.
  • Altera_Forum's avatar
    Altera_Forum
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    The notion of fractional fixed point is an extra complexity added recently by software mindset and their tools and imposed on fpga designers.

    In fpga mindset you can use integer concept without any problem. fractional approach is just another mental perspective of location of an imaginary decimal point.

    If you add or subtract n bits to m bits then you need one more bit (carry) for the result.

    if you multiply signed n bits by signed m bits then you need n+m bits for result but can safely use n+m-1 bits if you saturate the only case of overflow when both n and m are at maximum negative (or ignore satuaration if you don't expect this extreme)

    As an example of decimal point meaning, imagine you are asked to multiply your input by anything between 0 ~ 1 then you can choose 9 bit factor (0 ~ 256) then truncate 8 bits of result of multiplication thus you get (0 ~ 256)/256 i.e. 0 ~ 1 in fractions of 1/256 steps. Thus you can say the 9 bits value has decimal point between bit(8) and bit(7) of the range bit(8) ~ bit(0)
  • Altera_Forum's avatar
    Altera_Forum
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    --- Quote Start ---

    The notion of fractional fixed point is an extra complexity added recently by software mindset and their tools and imposed on fpga designers.

    In fpga mindset you can use integer concept without any problem. fractional approach is just another mental perspective of location of an imaginary decimal point.

    --- Quote End ---

    This is very true. At an implementation level, if you forget about the fraction/interger parts then it is all just integer arithmatic.

    But we need to monitor these two parts separately when you are doing performance checking of your algorithm/system, which is more important than just the FPGA design on its own.
  • Altera_Forum's avatar
    Altera_Forum
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    I am pretty sure we (FPGA designers) can manage all stages of design process from modelling through to verification without using the notion of decimal point. But not anymore as we are flooded with tools that force decimal entry. In my place of work, we use advanced dsp builder and it is very powerful tool now. I can see how my fellow engineers are puzzled; they enter the decimal notation until output is correctly scaled by trial and error resulting in really funny expressions and bizarre decimal locations. Another learning curve up or down.