I think that all questions can be answered best by applying somenumerical examples, using pencil and paper or a pocket calculator.
You'll notice, that you have to discard bits on the left for all multiply operations, even for fractional signed numbers (no integer bits). To avoid overflow, saturation logic has to be apllied, set the result MININT or MAXINT respectively. Saturation is also needed, if you want to handle overflows in add und sub, and for resize to fewer bits, as in your last example.
As previously suggested, the IEEE fixed point library can be used for the operations. But it's also easy to make a few VHDL functions that wrap your own code for it.