fir filter for fsk demodulator

it works with this scheme:

In_fsk --> sin(f0) cos(f0) mixing --> fir decimation with factor 16 with fs=200k and f(-40db)=6.3K --> fir with fs=200k/16 and f(-40db)=400Hz ---> sqrt(I^2+Q^2)

There is one branch for f0 and onother for f1...

Fir decimatior has about 100 taps and the next one has about 80 taps...the advantage is saving resources

--- Quote Start ---

To convert two frequencies to zeros and ones you need to get phase, unwrap it and convert to delay (difference of phase). Each tone will have its unique delay as you can see in the phase response of your filter.

--- Quote End ---

i don't undestand very well this thing or better i dotn't know how implement it in vhdl... how could i get phase from the fir response? Could you explain me better? Sorry but perhaps since the beginning of this discussion the part that it was less clear is exactly convert two frequencies to zero....(it's my fault) :(

Thanks again