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Altera_Forum
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22 years ago

FIFO Interface

The fifo interface (http://www.ece.utexas.edu/~desimone/fifo_interface/) component interfaces a FIFO megafunction to the Avalon bus so the master can read or write it like a peripheral. It's pre...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
22 years ago

Mike,

Having done some fine-reading on the header file "arlut_fifo_interface_regs.h" and its macro's followed by a quick simulation I think I finally can contribute constructively to your fifo interface.

The REGISTER_BIT macro should read 

#define REGISTER_BIT(regName, bitName, bitNum) 
    ARLUT_FIFO_INTERFACE_##regName##_##bitName##_OFST =   bitNum, 
    ARLUT_FIFO_INTERFACE_##regName##_##bitName##_MSK = (1 << 
  ARLUT_FIFO_INTERFACE_##regName##_##bitName##_OFST)

The original one never takes account of the bitNum parameter (end of second line).

regards

henning