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Altera_Forum
Honored Contributor
17 years agoFaulty State Machine
Hi there, There is a bug in the following state machine that sometimes causes the state transits directly from standby to locked (or some undefined state and stays there) when the enable signa...
Altera_Forum
Honored Contributor
17 years agoPersonally, I also prefer single process state machines. They provide in a compact form what you have to achieve with additional temorary variables in much more text in the above used style.
The reason for failure is possibly in this lineelsif asd_pass >= asd_max_pass-1 then where you are using the temporary variable in the comparison but you should use the registered one. More generally, asynchronous input signal are always a rich source of possibly failing code. Any external input signal to the state machine, e.g. enable must be known synchronous to clk or has to be synchronized additionally. Also the reset should be synchronously released.