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Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Fails to compile when using the hard DDR controller in Cyclone V part.

HI, I am using the Altera Cyclone V GT development kit. I have been working with this board for about 2 years. The card has 2 banks of DDR memory. One bank is 64-bits wide, and uses a ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

HI,

The error message looks like you are connecting Hard DDR pin to your own user design.

Hard DDR controller UNIPHY IP comes with dedicated hard pin connection. You can't connect hard DDR pin to your user design. It's only allow to connect to external SDRAM on board.

Thanks.

Regards,

spdl2001

(This message was posted on behalf of Intel Corporation)