Forum Discussion
failed in creating agilex-f p-tile-pcie-avmm (RP X4) design example
- 5 years ago
Sorry, I overlook the dev kit setting. After putting the Agilex dev kit and generate the ED, the design files look bigger so I can't directly attach to here.
Here is the step to get the file:
Install Filezilla that can download from here:
https://filezilla-project.org/download.php?type=client
After installing, launch the tool and login as below:
Host: secureftp.intel.com
Username: tmp01481
Password: W@ng1234
Port 21.
You can see the zip file is located at the right of the window. Name = wang_ag.zip.
Hi Sir,
The Generation fail is due to "Enable PHY Reconfiguration" option is turned on. I opened the attached .ip file turn on the option and the generation is successful.
This is a known issue that generation will fail when you turn on the option. This issue will fix in future quartus version.
It is still not working on my side. I deleted the whole old project folder, and re-did the generation from beginning. I am sure the "enable phy reconfiguration" option is off in GUI this time. But the generation is failed almost in the same way as last time, the error messages and ip file are attached.
The log message shows that the device part number and the development kit board used in the generation are still not matching with the settings. For me it looks like the generating tcl does not sync the system settings.
Since it is working on your side, I worry that some of the tool settings may not be right on my side? As I mentioned before, there is no way for me to set the development board in new project wizard (the board tab is empty).
regards,
Xiao