nikhlNew Contributor3 years agoFailed Co simulation of a Example HLS design Hi , I am have installed the intel Quartus prime 22.2 development suite in my system and tried to compile and test the HLS counter example design but it fails in the Co-simulation. i++ counter...Show More
hareeshFrequent Contributor3 years agoHi,As we discoursed in call please update your simulators and same steps.
Recent DiscussionsNeed Part EOL status(Active/Obsolete/Discontinued/NRND)EP4CGX22CF19C8N Failure Short D8 to C8Cold Temperature IssueI want to understand the practical difference between Best Speed and Smallest Area in FPGA .FPGA resource issue of Cyclone 10 GX devices