External Interface-like connection HPS to FPGA

Are you trying to connect to logic outside of your Qsys system? I'm assuming that's what you're asking. The easiest way is to "stub out" the Avalon bus. They may have a simple module to do this now, but last I checked, you have to create a very simple custom component with the component editor. No code, just go into the signals tab, create a new Avalon slave, and then define, data, address, read, write, and if necessary wait_req.

It's not really an HPS-specific question, so you might find more info elsewhere in the forum. I'll look to see if I have any examples in the code I'm using on my Helio SoC board and will let you know if so.