External core clock input (J70, J71) ALTERA stratix v gt

Thank very much both of you. If i understood it well, the core clock can be used as clock to my design logic just like the four dedicated transceiver clocks are used as a reference clock to any transceiver phy block in my design, right?

And another question, related in some way with my first question, is there a 10MHz reference on the board so as to to synchronize with other lab equipment. In the board reference manual i didn't notice anything... So, i have to create this clock from a transmitter for example.