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Altera_Forum
Honored Contributor
15 years agoEthernet link speed auto detection
Hi I have a custom board with a ethernet PHY connected to the FPGA using RGMII. I am using triple speed ethernet and iniche. I do not have the signals set_10 and set_1000 from the PHY. I can...
Altera_Forum
Honored Contributor
15 years agoBut it works ;)
Actually the older PHYs used to have a pin that could directly report the link status. But today we want smaller and smaller PHYs, the chips have fewer pins so they have to reduce the number of functions. Monitoring the LED pins work quite well. I did that on a design that has a continuous built-in-test routine that needs to check regularly that all the links are up. MDIO polling works, but monitoring the LED pins is a lot faster. Unfortunately during an MDIO read access with the TSE the CPU is frozen until the response has been received, and I'd rather have the CPU do something else during the MDIO cycle.