Ethernet communication between FPGAs

Hi Dave,

That seems like part of the document in TSE.... :p

Also the diagram... I believe based on the pin connection it was using the RGMII and the external phy.

There are quite a number of ways to go about this. Part of it, I would suggest that you refer to the alterawiki.com and look for TSE example. The other part is to download the devkit that was tie to the example. Then you can reference the pins used on the board for the TSE.

Try this --> http://www.alterawiki.com/wiki/single-port_triple-speed_ethernet_and_on-board_phy_chip_reference_design