Error: Type conversion (to UNSIGNED) can not have string literal operand

Change the line near the end to:

DATA<= unsigned(DATAi)-UNSIGNED(std_logic_vector'(X"80")) when SIGNED_DATA=0 else DATAi;

Note the change to enforce that the argument to UNSIGNED() is a std_logic_vector.

Cheers,

Dave

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Change the line near the end to:

DATA<= unsigned(DATAi)-UNSIGNED(std_logic_vector'(X"80")) when SIGNED_DATA=0 else DATAi;

Note the change to enforce that the argument to UNSIGNED() is a std_logic_vector.

Cheers,

Dave

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Hai Dave,

Thanks, its can simulate know..I have another question, can you help me to verify it. I have line code of bp<=SXT(a,9) + b and bp<= a+b, wheres a and b is std_logic_vector(7 downto 0) and bp is std_logic_vector(8 downto 0). My question is what the different between the two line codes? thanks in advance

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I have another question, can you help me to verify it. I have line code of bp<=SXT(a,9) + b and bp<= a+b, wheres a and b is std_logic_vector(7 downto 0) and bp is std_logic_vector(8 downto 0). My question is what the different between the two line codes? thanks in advance

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Neither is correct. If a, b, and bp are all std_logic_vector, then you cannot add without converting to signed or unsigned. std_logic_vector is just an array of bits, the compiler does not know how you want to interpret those bits, so you have to tell it using explicit casts/type-conversions.

bp <= std_logic_vector(unsigned(a) + unsigned(b));

where a and b are converted to unsigned, the sum a+b is also unsigned (1-bit wider), and it is converted to std_logic_vector before being assigned to bp (which is also std_logic_vector).

Cheers,

Dave

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Neither is correct. If a, b, and bp are all std_logic_vector, then you cannot add without converting to signed or unsigned. std_logic_vector is just an array of bits, the compiler does not know how you want to interpret those bits, so you have to tell it using explicit casts/type-conversions.

bp <= std_logic_vector(unsigned(a) + unsigned(b));

where a and b are converted to unsigned, the sum a+b is also unsigned (1-bit wider), and it is converted to std_logic_vector before being assigned to bp (which is also std_logic_vector).

Cheers,

Dave

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Hai Dave,

Then, what the different between bp<=SXT(a,9)+b with bp<=a+b? Or is it there are same actually? Can you give simple example for both line codes? Need helps,thanks in advance

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what the different between bp<=SXT(a,9)+b with bp<=a+b? Or is it there are same actually? Can you give simple example for both line codes? Need helps,thanks in advance

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Both are invalid syntax.

As commented in a previous thread in response to your question, SXT just extends the a signal by 1 bit.

Rather than asking these questions, you should create a Modelsim simulation and try to figure it out yourself. You'll learn much better that way.

Cheers,

Dave