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Is it that there's an error in the Tutorial "Using the DE0-Nano ADC Controller"?
Using the code on page 10, starting Analysis & Synthesis results in the error "top level design entity "adc_system" is undefined".
First line of code is: module
adc_demo... Using
adc_system instead seems to work.
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yes there is, but is not the code, page 6 clearly states:
"to make a new system with the adc controller, create a new project in quartus ii named adc_demo. the top-level module should also be adc_demo." the error is in page 8 when it states:
"create a new verilog file and copy the code from figure 8 into it, or use the one provided in the “design files” subdirectory. save this file as adc_system.v" even the provided file is correctly named
adc_demo.v best regards.
Honored Contributor
