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FPGAOLOG's avatar
FPGAOLOG
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

Error: rs232_0: The input clock frequency must be known at generation time.

I try to instantiate an RS232 UART Intel FPGA IP. and it gives the following error during generation: Error: rs232_0: The input clock frequency must be known at generation time. I tried the worka...
RichardT_altera's avatar
RichardT_altera
Icon for Super Contributor rankSuper Contributor
3 years ago

We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.


Best Regards,

Richard Tan


p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos.


  • FPGAOLOG's avatar
    FPGAOLOG
    Icon for Occasional Contributor rankOccasional Contributor
    3 years ago

    I have tried the solution and mentioned it did not work in the original message which was replied with the solution that did not work.