Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Error: Bus name allowed only on bus line -- signal "vcprst[15..0]"

when i analysis and synthesis the boost converter programming ,then i got following error.please help me that how i rectify these error and exactly where is the error? Error: Bus name allo...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Are you using the schematic editor?

If so, you need to highlight the entire net, then right click on it and select "Bus Line" from the popup menu.

The net will now appear thicker.