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Altera_Forum
Honored Contributor
Honored Contributorerror 10482
I'm writing my vhdl code for a lab assignment. When I try to simulate, I get this error and don't understand what it means: Error (10482): VHDL error at LW6.vhd(15): object "down" is used but not dec...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- bit_vector(2 down to 0); --- Quote End --- Review your VHDL text book or a Altera Quartus example. You should write downto not down to.
