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Altera_Forum
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12 years ago

EPM7064s INPUT/OE/GCLK pins connection while using ISP(JTAG)

Hello, At the moment I'm a student at Avans Hogeschool in the Netherlands. I want to use the EPM7064s CPLD for a project. I would like to program it with JTAG. I only have a question about...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

You need to drive them to a valid I/O voltage. To quote a report file:

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This pin should be connected to GND. It may also be connected to a valid signal on the board (low, high, or toggling) if that signal is required for a different revision of the design.

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Regards,

Alex