EPF10k10 reconfiguration

Hi

exactly - the rising edge at the end of the low pulse at nConfig (re)starts the configuration process..

Great! Thanks!

-Mux

Using nCONFIG is overkill though, since it forces reconfiguration of the FPGA. If you have any external devices relying on the FPGA I/Os being in a specific state, then since the I/Os will tri-state (or pull-up) during reconfiguration, you'd have to be careful about having pull-downs on any signals that needed them.

If all you want is a reset, then you can just use a reset input (ideally routed to a global input pin on the FLEX10K series).

However, overkill maybe what you're after ... :)

Cheers,

Dave

Yeah, it might be little overkill :-)

That said, it's an easy way to get everything re-initialized. The Z80 will run at about a quarter of the clock speed so any I/O operations will be handled by a state machine. While I could dedicate a global (thanks for point that out btw) pin as a reset, it'd mean I'd have to wrap every block with an if (~reset). No big deal, but still..

I'll give it some thought though as I'd still like the clock-divider to be moved into the FPGA rather than have it as an external counter..

-Mux

P.S. The Z80 will also tri-state all of its pins during reset, so we're all good :-)

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I'd have to wrap every block with an if (~reset). No big deal, but still..

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I'd recommend doing that anyway.

When you simulate a design, its nice to use reset to initialize the system - multiple times during the simulation if that is what you are trying to test.

If you do not have a reset signal, then you need to initialize all signals, so that the simulation does not start with them all in an unknown state.

Anyway, its your call, I just figured I'd point out why you might want to use reset ...

Cheers,

Dave

LOL - Yeah, you're right.. Thanks for the post!

-Mux