Honored Contributor
Honored ContributorYeah, it might be little overkill :-)
That said, it's an easy way to get everything re-initialized. The Z80 will run at about a quarter of the clock speed so any I/O operations will be handled by a state machine. While I could dedicate a global (thanks for point that out btw) pin as a reset, it'd mean I'd have to wrap every block with an if (~reset). No big deal, but still.. I'll give it some thought though as I'd still like the clock-divider to be moved into the FPGA rather than have it as an external counter.. -Mux P.S. The Z80 will also tri-state all of its pins during reset, so we're all good :-)
