Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

EPCS64 boot configuration

Hi, I working into the DE2-115 board. I want to save the Nios II program into the EPCS64 memory. (Save SOF content and ELF content into EPCS). I tried a lot of configuration that I have read in forums, etc. I am using Quartus II 64 bits web edition. The design is made in Qysys.

I have:

cpu with reset vector to EPCS controller (offset 0, then reset vector = base address of epcs controller=0x00021000).

cpu vector exception to onchip memory.

I have the jtag debug module properly connected (reset and data bus)

Nios CPU has a 50 Mhz ****, and the epcs controller has a clock of 20 Mhz (through altpll).

When I follow these steps:

https://www.altera.com/support/support-resources/knowledge-base/solutions/rd11192013_118.html

but I got an error when I tried to communicate with the EPCS device. (nios2-flash-programmer --epcs --base=0x00021000 hw.flash --debug)

I get this error:

Using cable "USB-Blaster [USB-0]", device 1, instance 0x00

Resetting and pausing target processor: OK

Processor data bus width is 32 bits

Looking for EPCS registers at address 0x00021000 (with 32bit alignment)

Initial values: 00000000 00000000 6123D6C4 00000006 00000000 00000000

Not here: reserved fields are non-zero

Looking for EPCS registers at address 0x00021100 (with 32bit alignment)

Initial values: 00000000 00000000 6123D6C4 00000006 00000000 00000000

Not here: reserved fields are non-zero

Looking for EPCS registers at address 0x00021200 (with 32bit alignment)

Initial values: 00000000 00000000 6123D6C4 00000006 00000000 00000000

Not here: reserved fields are non-zero

Looking for EPCS registers at address 0x00021300 (with 32bit alignment)

Initial values: 00000000 00000000 6123D6C4 00000006 00000000 00000000

Not here: reserved fields are non-zero

Looking for EPCS registers at address 0x00021400 (with 32bit alignment)

Initial values: 00000000 00000000 6123D6C4 00000006 00000000 00000000

Not here: reserved fields are non-zero

No EPCS registers found: tried looking at addresses

0x00021000, 0x00021100, 0x00021200, 0x00021300 and 0x00021400

Leaving target processor paused

What it can be wrong? I cant figure out.

Thank!

10 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Hi frank2215,

    Is your Nios processor using an MMU? If so, you will need to add the --mmu switch to your nios2-flash-programmer command line: nios2-flash-programmer --epcs --mmu --base=0x000021000 hw.flash --debug

    If that doesn't work then are you sure that the Nios processor is even seeing the flash? Have you confirmed your base address is correct?

    Just my two cents.

    - Brad
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    --- Quote Start ---

    Hi frank2215,

    Is your Nios processor using an MMU? If so, you will need to add the --mmu switch to your nios2-flash-programmer command line: nios2-flash-programmer --epcs --mmu --base=0x000021000 hw.flash --debug

    If that doesn't work then are you sure that the Nios processor is even seeing the flash? Have you confirmed your base address is correct?

    Just my two cents.

    - Brad

    --- Quote End ---

    Brad,

    No, I am not using MMU, just a C application. I tested the EPCS64 downloading in other project a POF configuration and all works fine. I did nit try to write/read operatios. But I guess that the EPCS transactions are made by the FPGA, not the NIOS running any program. The base address is set right (0x00021000). Inmediately I download the SOF file, the leds power on in random fashion. It seems like the configuration is not working, these happens when the reset vector is set to EPCS controller base address.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Any reason you sent a different clock rate to the epcs controller in qsys? Try using the 50MHz for both NIOS and EPCS controller.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Is your FPGA configured? Check the LED. If the FPGA isn't configured, use the programmer to load the sof file before using the nios2-flash-programmer command. Also, use the --mmu option if the nios processor you've chosen has an mmu in it regardless of if you are using the mmu or not.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    I testet the epcs controller with 50 Mhz, (the same cpu freq) and does not work. Also tested with 20 mhz (altpll) and does not work as well.

    I tested exporting the epcs pins to the verilog top level, and I assigned to the pyshical epcs pins. Now I have something new. The FPGA is configured when I download the sof file, if I run the jtag command, I get:

    $ jtagconfig -n

    1) USB-Blaster [USB-0]

    020F70DD EP3C120/EP4CE115

    Node 19104600 Nios II# 0

    Node 0C006E00 JTAG UART# 0

    Design hash 6122D8B3ADF70138D8B4

    The processor is running, but if I try to ask for the EPCS I have the following:

    nios2-flash-programmer --epcs --base=0x00021000 --debug

    Using cable "USB-Blaster [USB-0]", device 1, instance 0x00

    Resetting and pausing target processor: OK

    Processor data bus width is 32 bits

    Looking for EPCS registers at address 0x00021000 (with 32bit alignment)

    Initial values: 0001703A 04C00074 9801483A 9CFFF804 983FFD1E 0000203A

    Not here: reserved fields are non-zero

    Looking for EPCS registers at address 0x00021100 (with 32bit alignment)

    Initial values: 93000237 6300080C 603FFD26 90000335 A8000C26 03010004

    Not here: reserved fields are non-zero

    Looking for EPCS registers at address 0x00021200 (with 32bit alignment)

    Initial values: 02C02004 002EE03A 00000F06 90000335 4000683A 0017883A

    Not here: reserved fields are non-zero

    Looking for EPCS registers at address 0x00021300 (with 32bit alignment)

    Initial values: 003FD006 5280040C 501496FA 701CD07A 729CB03A 843FFFC4

    Not here: reserved fields are non-zero

    Looking for EPCS registers at address 0x00021400 (with 32bit alignment)

    Initial values: 00000000 00000000 00000260 00000000 00000000 00000001

    Valid registers found

    EPCS signature is 0xFF

    EPCS device doesn't support RDID command

    EPCS identifier and signature are all ones - please check for data stuck high

    No EPCS layout data - looking for section [EPCS-FF]

    Unable to use EPCS device

    Leaving target processor paused

    I am not using MMU, actually I use the NIOS economyc version which do not have the MMU / MPU support.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Hi frank2215,

    The fact that the nios2-flash-programmer found some valid registers @0x00021400 is a good sign.

    It appears that that the programmer can't read the ID of the flash IC being used in order to know it's geometry. When I ran into this problem with a 8 MB serial flash IC, the programmer told me I needed to create section [EPCS-010216].

    I ended up creating an override file ("nios2-flash-override.txt") and stored it on my system @ c:\altera\14.1\nioseds\bin.

    This override file contained the following:

    [EPCS-010216]

    sector_size - 65536

    sector_count = 128

    Once I did that, the nios2-flash-programmer recognized my device at the address for the valid registers (which was 0x400 in my case) and I was able to program it.

    It sounds like you device ID isn't recognized so you might have to create a section in the override file called [EPCS-FF] with he proper sector size and sector count values for your device. You should be able to find these values from the datasheet for your flash.

    Let us know if that helps or if you continue to run into other problems.

    - Brad
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Hi, I added the next lines to the nios2-flash-override.txt file:

    [EPCS-FF]# EPCS64N(lead-free)

    sector_size = 65536

    sector_count = 128

    Now I tried to erase all the EPCS memory, using the respective command, but took almost an hour for an EPCS64 memory:

    Now I am trying to program it with first the sof file converted to .flash: This is the output:

    $ nios2-flash-programmer --epcs --base=0x21400 hw.flash --debug

    Reading override file "C:/altera/14.0/nios2eds/bin/nios2-flash-override.txt"

    Using cable "USB-Blaster [USB-0]", device 1, instance 0x00

    Resetting and pausing target processor: OK

    Processor data bus width is 32 bits

    Looking for EPCS registers at address 0x00021400 (with 32bit alignment)

    Initial values: 00000000 00000000 00000260 00000000 00000000 00000001

    Valid registers found

    EPCS signature is 0xFF

    EPCS device doesn't support RDID command

    Using EPCS size information from section [EPCS-FF]

    Device size is 8MByte (64Mbit)

    Erase regions are:

    offset 0: 128 x 64K

    EPCS status is 0xFF

    : Checksumming existing contents

    00000000 : Verifying existing contents

    00000000 : Needs erase then program

    00010000 : Verifying existing contents

    00010000 : Needs erase then program

    00020000 : Verifying existing contents

    00020000 : Needs erase then program

    00030000 : Verifying existing contents

    00030000 : Needs erase then program

    00040000 : Verifying existing contents

    00040000 : Needs erase then program

    00050000 : Verifying existing contents

    00050000 : Needs erase then program

    00060000 : Verifying existing contents

    00060000 : Needs erase then program

    00070000 : Verifying existing contents

    00070000 : Needs erase then program

    00080000 : Verifying existing contents

    00080000 : Needs erase then program

    00090000 : Verifying existing contents

    00090000 : Needs erase then program

    000A0000 : Verifying existing contents

    000A0000 : Needs erase then program

    000B0000 : Verifying existing contents

    000B0000 : Needs erase then program

    000C0000 : Verifying existing contents

    000C0000 : Needs erase then program

    000D0000 : Verifying existing contents

    000D0000 : Needs erase then program

    000E0000 : Verifying existing contents

    000E0000 : Needs erase then program

    000F0000 : Verifying existing contents

    000F0000 : Needs erase then program

    00100000 : Verifying existing contents

    00100000 : Needs erase then program

    00000000 : Reading existing contents

    00010000 : Reading existing contents

    00020000 : Reading existing contents

    00030000 : Reading existing contents

    00040000 : Reading existing contents

    00050000 : Reading existing contents

    00060000 : Reading existing contents

    00070000 : Reading existing contents

    00080000 : Reading existing contents

    00090000 : Reading existing contents

    000A0000 : Reading existing contents

    000B0000 : Reading existing contents

    000C0000 : Reading existing contents

    000D0000 : Reading existing contents

    000E0000 : Reading existing contents

    000F0000 : Reading existing contents

    00100000 : Reading existing contents

    Checksummed/read 15kB in 510.3s

    00000000 ( 0%): Erasing

    00010000 ( 5%): Erasing

    00020000 (11%): Erasing

    00030000 (17%): Erasing

    00040000 (23%): Erasing

    00050000 (29%): Erasing

    00060000 (35%): Erasing

    00070000 (41%): Erasing

    00080000 (47%): Erasing

    00090000 (52%): Erasing

    000A0000 (58%): Erasing

    I guess that the 0x400 offset is due the CycloneIV bootloader, which has 1024 bytes of content. I do not know why took a lot of time to program and erase the memory. Also in one opportunity I guess that the programming was frozen because never pass the 0%.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Actually it is not frozen, I run the program again and it seems that is working, but it started 3 hours ago...

    $ nios2-flash-programmer --epcs --base=0x21400 hw.flash --debug

    Reading override file "C:/altera/14.0/nios2eds/bin/nios2-flash-override.txt"

    Using cable "USB-Blaster [USB-0]", device 1, instance 0x00

    Resetting and pausing target processor: OK

    Processor data bus width is 32 bits

    Looking for EPCS registers at address 0x00021400 (with 32bit alignment)

    Initial values: 00000000 00000000 00000260 00000000 00000000 00000001

    Valid registers found

    EPCS signature is 0xFF

    EPCS device doesn't support RDID command

    Using EPCS size information from section [EPCS-FF]

    Device size is 8MByte (64Mbit)

    Erase regions are:

    offset 0: 128 x 64K

    EPCS status is 0xFF

    : Checksumming existing contents

    00000000 : Verifying existing contents

    00000000 : Needs erase then program

    00010000 : Verifying existing contents

    00010000 : Needs erase then program

    00020000 : Verifying existing contents

    00020000 : Needs erase then program

    00030000 : Verifying existing contents

    00030000 : Needs erase then program

    00040000 : Verifying existing contents

    00040000 : Needs erase then program

    00050000 : Verifying existing contents

    00050000 : Needs erase then program

    00060000 : Verifying existing contents

    00060000 : Needs erase then program

    00070000 : Verifying existing contents

    00070000 : Needs erase then program

    00080000 : Verifying existing contents

    00080000 : Needs erase then program

    00090000 : Verifying existing contents

    00090000 : Needs erase then program

    000A0000 : Verifying existing contents

    000A0000 : Needs erase then program

    000B0000 : Verifying existing contents

    000B0000 : Needs erase then program

    000C0000 : Verifying existing contents

    000C0000 : Needs erase then program

    000D0000 : Verifying existing contents

    000D0000 : Needs erase then program

    000E0000 : Verifying existing contents

    000E0000 : Needs erase then program

    000F0000 : Verifying existing contents

    000F0000 : Needs erase then program

    00100000 : Verifying existing contents

    00100000 : Needs erase then program

    00000000 : Reading existing contents

    00010000 : Reading existing contents

    00020000 : Reading existing contents

    00030000 : Reading existing contents

    00040000 : Reading existing contents

    00050000 : Reading existing contents

    00060000 : Reading existing contents

    00070000 : Reading existing contents

    00080000 : Reading existing contents

    00090000 : Reading existing contents

    000A0000 : Reading existing contents

    000B0000 : Reading existing contents

    000C0000 : Reading existing contents

    000D0000 : Reading existing contents

    000E0000 : Reading existing contents

    000F0000 : Reading existing contents

    00100000 : Reading existing contents

    Checksummed/read 15kB in 510.3s

    00000000 ( 0%): Erasing

    00010000 ( 5%): Erasing

    00020000 (11%): Erasing

    00030000 (17%): Erasing

    00040000 (23%): Erasing

    00050000 (29%): Erasing

    00060000 (35%): Erasing

    00070000 (41%): Erasing

    00080000 (47%): Erasing

    00090000 (52%): Erasing

    000A0000 (58%): Erasing

    000B0000 (64%): Erasing

    000C0000 (70%): Erasing

    000D0000 (76%): Erasing

    000E0000 (82%): Erasing

    000F0000 (88%): Erasing

    00100000 (94%): Erasing

    Erased 1088kB in 850.6s (1.2kB/s)

    00000000 ( 0%): Programming

    00010000 ( 5%): Programming

    00020000 (11%): Programming
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Hi frank2215,

    It looks like the programmer is performing the necessary tasks (erasing and programming). But it definitely should not take several hours to complete.

    Are you sure you put the correct entries for the sector_size and sector_count variables for your flash? I'm not sure how the programmer will behave if the values don't match the geometry of the flash.

    Also, according to your output log, it appears that the programmer thinks it erased 1088kB (~1.09 MB) of data instead of 8 MB. This also seems to be confirmed by the address range the programmer is accessing (0x0010,0000). The programmer should be accessing up to address 0x007F,FFFF (8 MB). You should probably take a closer look at that.

    Did the programming ever complete? If so, how long did it take?

    - Brad
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    Hi Brad,

    I double checked the sector and sizes. Also I saw into the Terasic demonstrations folder, a folder called EPCS patch, which has the override file which this content:

    [EPCS-010216]# EPCS64N(lead-free)

    sector_size = 65536

    sector_count = 128

    [EPCS-012018]# EPCS128N(lead-free)

    sector_size = 262144

    sector_count = 64

    I put this content, and then the option with FF signature. The kit (DE2-115) has an original EPCS memory from Altera. It is weird, took like 5 hours I guess. But the previous log is not for an "erase-all" instruction, is for a programming image. However something is not working well.