I testet the epcs controller with 50 Mhz, (the same cpu freq) and does not work. Also tested with 20 mhz (altpll) and does not work as well.
I tested exporting the epcs pins to the verilog top level, and I assigned to the pyshical epcs pins. Now I have something new. The FPGA is configured when I download the sof file, if I run the jtag command, I get:
$ jtagconfig -n
1) USB-Blaster [USB-0]
020F70DD EP3C120/EP4CE115
Node 19104600 Nios II# 0
Node 0C006E00 JTAG UART# 0
Design hash 6122D8B3ADF70138D8B4
The processor is running, but if I try to ask for the EPCS I have the following:
nios2-flash-programmer --epcs --base=0x00021000 --debug
Using cable "USB-Blaster [USB-0]", device 1, instance 0x00
Resetting and pausing target processor: OK
Processor data bus width is 32 bits
Looking for EPCS registers at address 0x00021000 (with 32bit alignment)
Initial values: 0001703A 04C00074 9801483A 9CFFF804 983FFD1E 0000203A
Not here: reserved fields are non-zero
Looking for EPCS registers at address 0x00021100 (with 32bit alignment)
Initial values: 93000237 6300080C 603FFD26 90000335 A8000C26 03010004
Not here: reserved fields are non-zero
Looking for EPCS registers at address 0x00021200 (with 32bit alignment)
Initial values: 02C02004 002EE03A 00000F06 90000335 4000683A 0017883A
Not here: reserved fields are non-zero
Looking for EPCS registers at address 0x00021300 (with 32bit alignment)
Initial values: 003FD006 5280040C 501496FA 701CD07A 729CB03A 843FFFC4
Not here: reserved fields are non-zero
Looking for EPCS registers at address 0x00021400 (with 32bit alignment)
Initial values: 00000000 00000000 00000260 00000000 00000000 00000001
Valid registers found
EPCS signature is 0xFF
EPCS device doesn't support RDID command
EPCS identifier and signature are all ones - please check for data stuck high
No EPCS layout data - looking for section [EPCS-FF]
Unable to use EPCS device
Leaving target processor paused
I am not using MMU, actually I use the NIOS economyc version which do not have the MMU / MPU support.