Honored Contributor
Honored ContributorIt does look like the altasmi_parallel megafunction would allow me to reset the protection bits, but I'm not sure how to get it into my design. The board I am working with does not have a JTAG interface, so the only way I can configure the Cyclone is via the EPCS4 chip. This is why I was looking for a way to reset these bits via the Programmer or some other software.
I considered programming another Cyclone board I have with the altasmi_parallel megafunction and connecting it to the EPCS4 via the 10-pin interface, but I don't see how I can do this the way the megafunction is constructed (there are no ASDI, nCS, DCLK or DATA ports). So I guess I'm left with either writing my own interface for the second Cyclone board using the timing specified in the Configuration Handbook or else trying to hack-on a JTAG interface to the board I'm using. Is there really no way using Quartus-II to reset these protection bits without having to program the FPGA itself first?
