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13 years agoEPCQ, Stratix V and Nios Flash Programmer issue
I have a custom Stratix V design with EPCQ256 connected in x4 mode.
I can program the EPCQ through the FPGA with Quartus Programmer, but can't use the Nios Flash Programmer. My epcq ip core is at address 0x40000, so according to Table 5-1 of the guide the register should be at 0x40400 nios2-flash-programmer complains thusly: Looking for EPCS registers at address 0x00040400 (with 32bit alignment) Initial values: 00000019 00000019 00000260 00000000 00000019 00000001 Not here: reserved fields are non-zero I can use either the Nios or a JTAG Avalon master to examine these registers immediately after a reset, and some of these registers are never 0. However, I can run a Nios program and use the HAL routines (alt_flash_open_dev, alt_epcs_flash_get_info) to successfully open /dev/epcq and initialize it, so the HAL drivers don't find anything to complain about. The register contents are almost the same before and after opening and closing the device: reg offset before after register 100 0x00000019 0x00000019 register 101 0x00000019 0x00000019 register 102 0x00000260 0x00000260 register 103 0x00000000 0x00000000 register 104 0x00000019 0x00000019 <===== is this the problem? register 105 0x00000001 0x00000001 register 106 0x00000019 0x00000000 Any ideas? If register 104 is the problem, what could cause it not to read 0? Why don't the HAL routines complain? I'm using Quartus II 13.0, with patches 0.23 and 0.24 installed.