Encapsulating HLS streams

Hi,

May I have the design code and .log file for further investigate?

Thanks

Hi @AMEYE13​ ,

Thanks for getting back to me.

Let me provide a bit more information...

Basically, I am trying to encapsulate `stream` and `stream_in` in an object to be able to operate on my inputs more easily.

Would something like that possible?

template <int W>
class InputClass
{
private:
    using input_type = ac_int<W, false>;
    input_type word_;
    ihc::stream<input_type> & stream_;
 
public:
    // Constructor
    InputClass(ihc::stream<ac_int<input_type>> & stream) 
    : stream_(stream)
    {
        //std::cout<< "Constructor" << std::endl;
    }
 
    _read()
    {
      stream_.read();
    }
 
    _write(input_type & in)
    {
      stream_.write(in);
    }
};

using input_type = ac_int<W, false>;
 
ihc::stream<input_type> myStream1;
ihc::stream<input_type> myStream2;
ihc::stream<input_type> myStream3;
....
 
component void
my_component()
{
InputClass myInputClass1(myStream1);
InputClass myInputClass2(myStream2);
...
 
myInputClass1.read();
myInputClass1.write(...)
}

Please let me know if this would be an acceptable design, and if so, why I can't have it running.

Thanks

Best,

Val

Note:

You cannot derive new classes from the stream classes or encapsulate them in other
formats such as structs or arrays. However, you may use references to instances of
these classes as references inside other classes, meaning that you can create a class
that has a reference to a stream object as a data member.

I first missed this sentence in the HLS Reference doc and tried encapsulating `stream` and stream_in` in a struct.

In some cases, I get a silent failure at `_fpga` time, where compile is successful, and test also runs successfully but nothing seems to be read from the stream (successful blocking `read` but no data, or unexpected)

Best,

Val

Hi,

From the code you given, a component cannot read and write to the same stream (that would require the AVST interface to be both a source and a sink at the same time, and that is not possible).

Could you attached a file with full design code for me to further investigate?

Thanks

Hi,

Based on my understanding, you are using the command eg:i++ stream_test.cpp -v -march=x86-64 -o test-x86-64 or make test-x86-64, am I right?

If yes, this command is used to compile the C++ source

code to an x86-64 binary executable and run the generated executable on your

CPU.

You could able to use command eg: make test-fpga or i++ -march=Arria10 stream_test.cpp -o test-fpga

to have a .prj directory and you could able to find a .qpf file to open in Quartus Prime software.

Beside, I could not able to compile the file with error: 'utils.hpp' file not found. Could you try to attached the full design file?

Thanks