Forum Discussion
tehjingy_Altera
Regular Contributor
2 years agoHi Ricardo
This you select the arm A53 under the Intel SoC FPGA during the target selection?
Intel SoC FPGA > Agilex > Bare Metal Debug > Debug Cortex-A53_0
Regards
Jingyang, Teh
RicardoC
Occasional Contributor
2 years agoDo you have an update on how to configure the DK-DEV-AGI027RBES so that the HPS_JTAG signals of the Agilex part are in the JTAG chain?
Thank you,
Ricardo.