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Altera_Forum
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8 years ago

Enable DEV_CLRn in MAX-V

Hi, I would like to enable DEV_CLRn on pin 29 in order to do a device clear. However, it seems to be set to user I/O whenever I enable the pin in Quartus. How can I set the pin to be DEV_CLRn? Thanks...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
8 years ago

Hi sallo_93,

In the Quartus go to Assignment menu --> Device --> Device and Pin Options --> General then choose the “Enable device-wide reset (DEV_CLRn)” check box. This will enable the DEV_CLRn pin. Then recompile the project design.

Regards,

nyusof

(This message was posted on behalf of Intel Corporation)