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AGofs's avatar
AGofs
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

Emulated LVDS outputs and Quartus pin planner

At "CycloneV device handbook" wrote: "Emulated LVDS, RSDS and mini-LVDS output buffers use two single-ended output buffers with an external single-resistor or three-resistor network, and can be tri-...
SreekumarR_G_Intel's avatar
SreekumarR_G_Intel
Icon for Frequent Contributor rankFrequent Contributor
6 years ago

As per my understanding you have to use the ALTIOBUFF IP to instantiate the Buffer. You can check with design without adding and with in RTL viewer. :)

Thank you,

Regards,

Sree