Forum Discussion
AdzimZM_Altera
Regular Contributor
2 years agoHi Bharat,
Thank you for your feedback.
I have checked the IP parameter and the setting is okay.
Can you check if there any timing violation in the "Report DDR" section inside the Compilation Report?
Since there is only one interface that is failing, can you try to swap the RDIMM at the fails interface with working interface?
Can you run an EMIF example design in the fails interface? Using similar pin placement of the fails interface with just one interface in the design.
Regards,
Adzim