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Altera_Forum
Honored Contributor
17 years agoEDA TOOL =>Run gate-level
Since block Diagram.bdf, I use Run gate-level simulation automatically from EDA simulat Tool of quartusII.7.2 Web Edition I can stimulate the PLL (Altera_mf, Altpll) but I do not know how to se...
Altera_Forum
Honored Contributor
17 years agoHi,
Actually you can view all signals from all modules. From the "Workspace" plane", you can see "Samsertop_vhd_vec_tst" and under "Samsertop_vhd_vec_tst", you can see the instance name named as "i1". Under the "i1", you can see other modules instance names. Choose the module that you wish to debug and from the "Object" plane, choose the signals that you wish to debug, then drag it to your "Wave" plane.