Dynamic Partial Reconfiguration & Direct Bitstream File Manipulation

For Cyclone V you need very recent versions of the silicon and a special software licence - at least for the PCIe reconfig stuff.

There is also a errata that means that fmax is reduced considerably - I suspect that the logic can end up short circuiting the power rails in the middle of the reconfiguration cycle.

Programming the periphery from EPCS and the rest of the device over PCIe might solve the PCIe reset time problems, but it likely to be an update nightmare.

You either need the EPCS write logic in the periphery or to guarantee to have the file that matches the configured periphery.

And, AFAICT, there is no way to have a 'factory' image - unless you use passive serial mode and have a jumper on the MAXX (or whatever) device that generates the EPCS read cycle.