Dual Configuration IP does not trigger reconfiguration in MAX 10

I have a design using 10M16SAU169I7G, with an instance of the remote_configuration IP. The nCONFIG pin is enabled like the NIOS example, and using some external pin logic, I can select and configure both images. When I try to reconfigure internally, I have proven that config_sel_overwrite and config_sel are working by asserting them and setting the nCONFIG pin low externally. But when I issue a trigger reconfiguration internally using offset 0 bit 0, the device does not reconfigure. Using signal tap I see the RU_nCONFIG logic being asserted.

I have tried disabling nCONFIG pin just in case it overrides, but that does not work. Also, the NIOS example enables it.

I have looked through the NIOS example and can't find any clues. That example is for a 10M50, and I am using a 10M16. My understanding is the only device this does not owrk on is a 10M02.

Somehow there must be some configuration parameter or subtle constraint that is preventing RU_nCONFIG from working, or somehow the device reconfigures and then reconfigures again to image 0 without me knowing.

The reset given to the Dual Configuration IP Core comes from a pin outside the FPGA. Therefore, eventually it is tristated and the external signal is ignored. I doubt the IP Core would issue a reconfiguration based on any activity on its pins during the loading of the image. As an experiment, I tied the Core's .nreset to the pll_lock and retested and there was no change in behavior.

Another thing I tested was this. The debugging process means I have loaded an A/B image. I am using JTAG to load a .sof with Signal Tap enabled. I tested after a power up without the JTAG load just in case the JTAG load interfered with reconfiguration. No change in behavior.

I am looking for any ideas or known working project to compare with.