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Altera_Forum's avatar
Altera_Forum
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14 years ago

DSP Pipelining

Hey guys, I've been posting on here for a while now, asking questions related to the NLMS senior project I've been working on. I now have the system working, and have...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

You can design your pipeline in such a way that a sample enters the pipeline on every clock. So while a sample enters at the front of the pipeline as many samples as your pipeline is long, are already travelling towards the output. The only (sic) thing you have to assure is that the necessary coefficients etcetera are also propagated through the DSP chain.

That way you only need a clock of about 16 MHz, which should be easy to achieve.