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Can you copy the output from u-boot as well? Does it report that calibration has passed (see below as an example) on your board?
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This is my terminal output:
U-Boot SPL 2013.01.01 (Jan 28 2015 - 17:56:44)
BOARD : Altera SOCFPGA Cyclone V Board
CLOCK: EOSC1 clock 25000 KHz
CLOCK: EOSC2 clock 25000 KHz
CLOCK: F2S_SDR_REF clock 0 KHz
CLOCK: F2S_PER_REF clock 0 KHz
CLOCK: MPU clock 800 MHz
CLOCK: DDR clock 300 MHz
CLOCK: UART clock 100000 KHz
CLOCK: MMC clock 3125 KHz
CLOCK: QSPI clock 3125 KHz
RESET: COLD
SDRAM: Initializing MMR registers
SDRAM: Calibrating PHY
SEQ.C: Preparing to start memory calibration
SEQ.C: CALIBRATION PASSED
SDRAM: 512 MiB
SDRAM: Scrubbing 0x01000000 - 0x02000000
SDRAM: Scrubbing success with 27 ms
SDRAM: Scrubbing 0x00000000 - 0x01000000
SDRAM: Scrubbing 0x02000000 - 0x20000000
So it's ok with SDRAM calibration. Furthermore I've done a simple write/read test over SDRAM address space and it was successful.
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If you try the following, does this work on your custom board?
Code:
set semihosting enabled false
loadfile "u-boot-spl.axf" 0x0
set semihosting enabled true
delete
tbreak spl_boot_device
run
wait
loadfile "hwlib.axf" 0x0
start
This will wait for uboot to reach a safe location in the code.
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I've tried it excepting enabling semihosting (I do it after preloader due to it is unhosted one). Here is output in debugger:
+reset system
+stop
WARNING(CMD315): Target is not running
+set semihosting enabled false
+loadfile "C:\workspace\arm\Altera-SoCFPGA-HardwareLib-16550-CV-GNU\u-boot-spl"
Target has been reset
Loaded section .text: S:0xFFFF0000 ~ S:0xFFFF67A3 (size 0x67A4)
Loaded section .rodata: S:0xFFFF67A4 ~ S:0xFFFF87E6 (size 0x2043)
Loaded section .data: S:0xFFFF87E8 ~ S:0xFFFF94EF (size 0xD08)
Entry point S:0xFFFF0000
Execution stopped at: S:0xFFFF0004
S:0xFFFF0004 40,0 ldr pc, _undefined_instruction
+delete
All user breakpoints deleted
+tbreak spl_boot_device
Breakpoint 1 at S:0xFFFF14AC
on file spl.c, line 71
on file spl.c, line 81
+run
Reloading program
Starting target with image C:\workspace\arm\Altera-SoCFPGA-HardwareLib-16550-CV-GNU\u-boot-spl
Running from entry point
+wait
Execution stopped at breakpoint 1: S:0xFFFF14AC
In spl.c
S:0xFFFF14AC 71,0 {
Deleted temporary breakpoint: 1
+loadfile "C:\workspace\arm\Altera-SoCFPGA-HardwareLib-16550-CV-GNU\hwlib.axf"
Loaded section .ARM.exidx: S:0x00126694 ~ S:0x0012669B (size 0x8)
Loaded section .text: S:0x00100000 ~ S:0x0012661F (size 0x26620)
Loaded section .eh_frame: S:0x00126620 ~ S:0x00126693 (size 0x74)
Loaded section .ARM.exidx: S:0x00126694 ~ S:0x0012669B (size 0x8)
Loaded section .rodata: S:0x001266A0 ~ S:0x0012720F (size 0xB70)
Loaded section .data: S:0x00127210 ~ S:0x00127BC7 (size 0x9B8)
Entry point S:0x00100040
+set semihosting enabled true
Semihosting server socket created at port 8000
WARNING(TAB139): Semihosting was enabled after the target had started running so may not work correctly. Enable semihosting in a target initialization debugger script or with an image symbol instead
+start
Starting target with image C:\workspace\arm\Altera-SoCFPGA-HardwareLib-16550-CV-GNU\hwlib.axf
Running from entry point
interrupt
Execution stopped at: S:0xFFFF0004
S:0xFFFF0004 LDR pc, ; = 0xFFFF0020
And I need to stop it manually because it hangs.
Have you more ideas? ) Thank you for response.
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I'll ping the software folks on my team to see if they have any ideas, unfortunately I haven't run much software on the SoC yet to know if something else needs to be done. You should hear back tomorrow, if not post here to send me a reminder.
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Thank you, I am waiting for your response )
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