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Altera_Forum
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10 years ago

Driving PLLs off multiplexed clocks

Hi Guys, I have a system that I need to test over a range of frequencies and to save myself some time and effort I wish to automate the process (especially since I have to do this well over 10...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Hi,

The clock that went through the MUX should be considered a gated clock already. I believe this is why QII does not allow this to be fed into the subsequent PLL. Can you check if the PLL in your device support refclk selection or switching? I know transceiver PLL support this but not sure about normal PLL.